Many electronic devices and systems have the capability to store and retrieve information in a memory. Internally, a memory controller typically coordinates access to one or more memory devices which store the information. Several different memory families (e.g., DRAMs, pseudo-SRAM, NOR-flash, NAND-flash, etc.) are currently used for memory devices in such systems. Memory devices based on emerging technologies may be suitable as replacements for such current types of memory devices. In order to substitute newer types of memory devices for these current types of memory devices, the read and write performance of the substituted memories has to be met by the replacement memories. For example, to use a non-volatile memory device as a drop-in replacement for a DRAM in an electronic device without modifying others aspects of the electronic device, the substitute memory device must roughly match the read/write access speed of the DRAM (e.g., on the order of about 5 ns).
Resistive memory technologies, for instance, offer the significant advantages of non-volatility and fast read access but in some cases require longer time periods to write information into the memory material. Resistive memory utilizes the resistance value of a memory element to store one or more bits of data. For example, a memory element programmed to have a high resistance value may represent a logic “1” data bit value, and a memory element programmed to have a low resistance value may represent a logic “0” data bit value. Typically, the resistance value of the memory element is switched electrically by applying a voltage pulse or a current pulse to the memory element.
Phase change memory is one type of resistive memory which uses a phase change material in the resistive memory element. The phase change material exhibits at least two different states. The states of the phase change material may be referred to as the amorphous state and the crystalline state, where the amorphous state involves a more disordered atomic structure and the crystalline state involves a more ordered lattice. The amorphous state usually exhibits higher resistivity than the crystalline state. In a phase change random access memory (PCRAM), a phase change memory cell can be “reset” to a high-resistance amorphous state by heating the phase change material and then quenching the material. To “set” the phase change memory cell to a lower-resistance crystalline state, the material is heated and then slowly cooled down. The reset operation may require about 10 ns to complete, which is roughly in the range of the DRAM write speed. However, the set operation may require about 50 ns to 200 ns, depending on the phase change material, which is much longer than a typical DRAM write operation.
It would be desirable to take advantage of the benefits of emerging memory technologies while still approaching the write speeds expected of current memory technologies. Such capabilities would allow memory devices based on emerging memory technologies to be readily substituted for memory devices that employ current memory technologies such as DRAM and flash memories.